While one instruction is being executed, the next instruction is pre-fetched from the program memory. To maximize performance, the Atmega2560 uses an AVR-RISC (Harvard architecture) – with separate memories and buses for program and data. The resulting architecture is more code efficient and ten times faster than conventional CISC microcontrollers.
All 32 registers are directly connected to the Arithmetic Logic Unit (ALU). The AVR core of ATmega2560 combines a rich set of instructions with 32 general-purpose working registers.
